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64 Channel 16 bit 125 MS/s Digitizer


  • 16 bit @ 125 MS/s ADC
  • 64 analog inputs, differential or single-ended, 2Vpp input range
  • Four 2mm 40-pin header connectors
  • Wide range of applications (from Neutrino Physics & Dark Matter to Nuclear and Particle Physics to Spectroscopic Imaging)
  • Suited for signals from Semiconductor Detectors cupled with CSPs (Si, HPGe) or scintillators coupled with PMTs (NaI, CsI)
  • On-board firmware selection for different aquisition modes:
    • Scope mode (simultaneous raw waveform acquisition on common trigger)
    • DPP-PHA mode (pulse height and time acquisition on independent channel self-triggers)
    • Predisposition for other algorithms: QDC, PSD, data reduction, etc.
  • Multi-board synchronization and system building capabilities
  • Front panel fully programmable I/Os (4 LEMO TTL/NIM and 16 LVDS)
  • Special 125MS/s 14bit DAC output (LEMO) for signal inspection or trigger sum
  • On-board Xilinx Zynq® UltraScale+™ FPGA with embedded Linux-based ARM processor
  • 2.5GB of Total Acquisition memory (DDR4)
  • USB 3.0 type-C and 1/10 Gigabit Ethernet or optional CONET (CAEN Daisy Chainable Optical Link Protocol) interfaces
  • Fully supported by CoMPASS and WaveDump2 readout software
  • SDK for embedded Linux processor and host PC
  • Open FPGA


The VX2740 is a 64-channel digital signal processor in VME64X form factor belonging to a new generation of CAEN digitizers putting enhanced performances and increased functions at the service of Nuclear Physics. This module represents the natural evolution of the V1740 digitizer. Originally designed for Neutrino and Dark Matter experiments, it is actually suited for a wide range of applications in Radiation Detection.

It not only offers waveform digitization and recording but also MCA analysis for nuclear spectroscopy using most common detectors like Silicon strip, segmented HPGe, Scintillation detectors with PMTs, Wire Chambers. Pulse height measurements, on-board energy spectrum, constant fraction timing (sub-ns measurements) are some of the functions which can be performed independently for each of the 64 channels.

The internal architecture of the VX2740 is based on Zynq® UltraScale+™ MPSoC. The FPGA has an embedded quad-core ARM processor, running Linux. Each channel independently digitizes the signal coming from the detectors by means of a 16-bit 125 MS/s ADC. The sampled data are used to initiate the digital pulse processing sequence, managed in the FPGA at firmware level.

Different on-board firmware options can be selected via software, according to the setup and acquisition mode.

  • Scope mode: mainly intended for the acquisition of waveforms upon a common trigger. All channels acquire simultaneously a programmed number of samples around the trigger; the source of the common trigger can be external, a software command, or a combination of the channel self-triggers (thanks to individual channel discriminators with programmable threshold).
  • DPP-PHA mode: the acquisition is based on the independent channel self-trigger capabilities. Each channel gets and stores events independently of the others. Waveforms are still acquired but the wave samples are processed in real-time by the PHA algorithm on the FPGA and providing the physical quantities of interest. Together with the energy (from the pulse height) and time, energy spectra, the fine time stamps through digital CFD as well as a portion of the waveform, if required, can be provided. DPP-mode is well suitable for high counting rate.

Thanks to the large FPGA resources, the selection of DPP modes will be able to increase, including other in-progress algorithms which make Charge Integration (QDC), Pulse Shape discrimination (PSD) or data reduction (ZLE, DAW).

Events are stored in GB-size digital memories, DDR4 type, and available for readout through high transfer rate links: an USB3.0 interface (type-C) and a 1/10 Gigabit Ethernet optionally replaceable by an Optical Link interface (CAEN proprietary CONET protocol). The ARM processor manages the readout and implements the interface to the host computer.

The VX2740 is fully supported by CoMPASS (multi-parametric DAQ software for Spectroscopy) and WaveDump2 (scope software). A Software Development Kit (SDK) with C/C++ libraries and demos is provided for external Windows® and Linux® computers.

The digitizer offers an Open FPGA service. Users can access specific blocks of the FPGA to write digital algorithms for the online waveform data processing, to implement custom trigger and coincidence logics, involving the channel of the board or even across multiple boards. It is additionally possible to run custom processing software (data reduction, analysis, etc.) in the Linux system of the embedded ARM processor.

Technical Specifications

Form Factor

1-unit wide VME64x 6U module



Analog Input

64 channels
Single ended or differential



Four 2mm 40-pin header male

Full Scale Range
2 Vpp



Programmable DC offset adjustment on each input in the full-scale range

Digital Conversion

16 bits

Sampling Rate

125 MS/s (simultaneously on each input)

Digital I/O

AC-coupled input clock and sync signal
2.54mm 4-pin AMPMODU Mod II male

DC-coupled output reference clock and sync signal for multi-board synchronization
Differential LVDS
2.54mm 4-pin AMPMODU Mod II male


General purpose I/Os
Sigle-ended TTL/NIM
Software programmable (trigger, gate, veto, busy, etc.)
LEMO 00 male

16 differential LVDS I/Os
Software programmable (individual self-trigger outputs, trigger validations, Veto, Busy, Start, Stop, Pattern Input, etc.) 2.54mm 34-pin AMPMODU Mod II male

Acquisition Memory Buffer

2.5 GB total memory size (DDR4); maximum record length of 10 MS/ch

Acquisition Modes

Firmware stored in the on-board Flash Memory and live rebootable on software command

  • Scope Mode
  • DPP-PHA Mode
Trigger Modes
  • Common: all channels acquire simultaneously with the trigger (software, external or logic combination of self-triggers)
  • Uncorrelated: each channel acquires independently (channel self-trigger as local trigger)
  • Correlated: coincidence/anticoincidence among channels and/or an external trigger (TRG-IN, LVDS I/O)
  • External: channels are triggered by external trigger only (TRG-IN, LVDS I/O)

Multiprocessor System-on-Chip: Xilinx Zynq® UltraScale+™ mod. XCZU19EG (more than 1100 Logic Cells and 80Mbit memory) with embedded quad-core ARM processor running Linux®

Communication Interface
1/10 Gigabit Ethernet

SFP+ with RJ-45 (copper) or LC connectors (fiber)
Programmable by the open FPGA
TCP-IP stack implemented in the embedded ARM
Data transfer rate: t.b.d.

Type-C connector
USB 3.0 version
Data transfer rate: t.b.d.

Optical Link (optional)

CONET (CAEN protocol)
Daisy chainable: up to 8 boards by 1 optical link
Data transfer rate: Up to 80 MB/s with CONET2
Compatible with CAEN A3818 and A4818 cards

1VME 64X compliant interface
Compatible with CAEN V3718 and V4718 Bridges
Data transfer mode: BLT32, MBLT64, CBLT32/64, 2eVME, 2eSST
Data transfer rate: t.b.d


Access to special FPGA blocks to customize the trigger and acquisition or algorithms for the pulse processing

Readout SW

  • CoMPASS spectroscopy software
    (manages DPP firmware)
  • WaveDump2
    (manages Scope firmware)


SDK and Tools

General purpose C libraries with demo samples for host Windows® and Linux® PC, and embedded ARM



Compare with Digitizers.



PCI CONET Controller
Patch panel 64x LEMO 00 female to two x 1.27mm 68-pin ERNI SMC female
PCI Express CONET2 Controller
Optical Fiber Series
Cable assembly for Clock distribution 3-pin AMPMODU IV female terminations – 18 cm / 25cm
Adapter for Clock signal FISCHER S101A004 male to 3-pin AMPMODU IV female – 10 cm
VME to USB 2.0/Optical Link Bridge
VME to USB 3.0/Ethernet/Optical Link Bridge

Ordering Options

Code Description
WVX2740XAAAA VX2740 - 64 Ch 16 bit 125MS/s Digitizer, Diff   RoHS
WVX2740BXAAA VX2740B - 64 Ch. 16 bit 125 MS/s Digitizer, SE   RoHS