Suitable for various digital Gate/Trigger/Translator/Buffer/Test applications which can be directly customised by the user, and whose management is handled by two FPGA.
Features from a set of user defined customized setting Energy Distribution and Time Distribution Signal Shape Pile-up Emulation Baseline Drift Noise.
Programmable FPGA and I/O unit housed in a 1-unit wide VME 6U module. The board is a suitable solution for the implementation of digital functions such as Coincidence, Trigger Logic, Gate and Delay generator.
Programmable FPGA to implement complex logic functions VHDL coding expertise not required User-friendly software tools for board programming Pre-programmed set...
V1495/V2495/V977 and DT5495 are suitable boards for various digital Gate/Trigger/Translator/Buffer/Test applications which can be directly customised by the User, and whose management is handled by two FPGA.
Multichannel scaler operation with programmable dwell time from 1 µs to 4000 s up to 200 MHz of counting frequency. These models allows to use the board as a Multievent latching scaler housing up to 160 independent counting channels.
Channel Multihit TDC (25 ps) housed in a 1-unit wide VME 6U module. The channels can be enabled for the detection of hits rising/falling edges. The data acquisition can be programmed in Events or in Continuous Storage Mode.
Dual Timer and Delay Unit with completely passive delay via a set of calibrated coaxial cable stubs (50 Ohm). Output pulses are both provided normal and complementary.
1-unit wide VME module housing 8 independent logic level translators. Each of the 8 channels accepts a NIM or ECL signal and provides two NIM and two ECL outputs.
Clock Generator and FAN-OUT, LED and Ultra Violet LED Driver that can be operated as a signal or a clock fan-out from another external source. Compatible with A317 clock distribution cable.
CAEN Bridges are controllers with enhanced data rate and extended interfacing capabilities in VME, Desktop and PCIe form factors. Demos and Software tools included for all the possible experimental setup.