VX2751

Overview

The VX2751 Digitizer is a 16-channel digital signal processor for radiation detectors in the VME64X form factor. It offers not only waveform digitization and recording but also Multi-Channel Analysis for a complete range of applications like nuclear and particle physics, high-timing resolution, Fast Neutron Spectroscopy, and Homeland Security. It is compliant with fast signals typically coming from organic, inorganic, and liquid scintillators coupled to PMTs or SiPMs, as well as Diamond detectors.

VX2751 features 16 single-ended channels, each capable of digitizing detector signals using a 14-bit ADC at 1 GS/s. Data acquisition is driven by trigger signal generation and the identification of a Region of Interest (ROI), defined in terms of sample count or time duration. Trigger sources can be local (channel self-trigger), external, or software-based. Once acquired, the digitized data is processed within the FPGA, stored in high-speed memory as events—including Trigger ID and Timestamp tags—and then transferred via high-bandwidth communication interfaces for further analysis. The digitizer supports different acquisition modes, designed to balance throughput, latency, and data efficiency according to experimental requirements:

• Triggered Mode: All channels acquire data simultaneously upon a global trigger generated by a Central Logic Unit, which processes local triggers from individual channels. External and software triggers can also be configured as sources for the global trigger. Zero suppression algorithms can be applied to remove non-significant data and reduce the readout payload.
• Streaming Readout Mode: Each channel autonomously identifies its ROI using the self-trigger mechanism, acquiring data independently of the other channels. This mode includes automatic zero suppression (non-triggered channels are not acquired), maximizes acquisition rates, and is ideal for applications requiring real-time parameter extraction. In addition, a Correlated streaming configuration can be set to validate event acquisition through coincidence or anticoincidence logic between local and external triggers.

VX2751 can operate using both pre-configured firmware developed by CAEN and custom user-generated firmware, offering flexibility for a wide range of applications. Multiple firmware images can be stored simultaneously in the digitizer’s FLASH memory and quickly activated when needed. CAEN provides ready-to-use firmware solutions optimized for specific acquisition and processing needs:

• Scope Firmware: Based on full waveform recording in triggered acquisition mode. A zero suppression function is available to reduce unnecessary data readout.
• DPP-PSD Firmware: Implements Digital Pulse Processing algorithms for charge integration and pulse shape discrimination. Physical parameters such as energy, timestamp, and PSD are extracted from waveforms acquired in streaming readout mode. A CFD (Constant Fraction Discriminator) function is available for precise timestamping.

For users requiring custom acquisition and processing, the Open FPGA architecture enables firmware customization through Sci-Compiler. This graphical tool allows users to create personalized firmware solutions without HDL skills. In addition Sci-Compiler automatically generates drivers and libraries and provides graphical utilities for developing custom DAQ software.

The Linux-based Arm processor embedded in the onboard CPU makes it possible to run automated user routines. Multi-board synchronization can be implemented via backplane or front panel easy-cabling options. Multiple communication interfaces offer flexible readout options: USB 3.0 type-C and 1/10 Gigabit Ethernet.

For detailed information on available firmware for the 2751 family and the structure of programming files (.CUP), please refer to the following page.

The VX2751 fits in the single-slot CAEN VME64X u-crate, which allows you to convert the VME digitizer into a desktop board for lab tests. Moreover, you can check this FAQ to see which CAEN VME crates are suitable for this product.