DTL2745

Overview

The CAEN Mod. DTL2745 is an 8 channel desktop digitizer designed for high-resolution waveform acquisition and real-time digital pulse processing of signals from radiation detectors. Part of the DTL series, it combines compactness and performance, making it ideal for small experimental setups and laboratory environments.

Each channel features a 16-bit, 125 MS/s ADC capable of digitizing analog signals from detectors such as silicon sensors, HPGe, and scintillation detectors with PMTs or SiPMs. The data are processed in real time by a Kintex UltraScale+ FPGA, where several firmware options can be loaded to suit specific experimental configurations.

It addresses a wide range of applications, from Neutrino Physics and Dark Matter searches to Nuclear and Particle Physics and Spectroscopic Imaging. The digitizer is particularly suited for signals from semiconductor detectors coupled with charge-sensitive preamplifiers (Si, HPGe) or scintillators coupled with PMTs (NaI, CsI).

Data acquisition is managed through trigger generation and the definition of a Region of Interest (ROI) in samples or time. Trigger sources can be local (self-trigger), external, or software-controlled. Once acquired, the waveforms are processed in the FPGA, stored in high-speed memory with timestamp and trigger ID, and transferred via fast communication interfaces for further analysis.

The DTL2745 supports multiple acquisition modes to balance throughput, latency, and data efficiency:

• Triggered mode: All channels acquire simultaneously upon a global trigger generated by a central logic unit that processes local discriminators. External or software triggers can also serve as global sources. Optional zero-suppression can be applied to reduce data volume by removing non-significant samples.

• Streaming readout mode: Each channel operates independently with its own self-trigger, defining the ROI autonomously. This mode applies automatic zero-suppression (inactive channels are skipped), maximizing acquisition rate and enabling real-time parameter extraction for high-rate applications. In addition, a Correlated streaming configuration can be set to validate event acquisition through coincidence or anticoincidence logic between local and external triggers.

The open FPGA architecture enables users to develop custom processing algorithms, trigger logic, and data handling strategies. CAEN provides ready-to-use Scope and DPP firmware, along with Firmware Development Kit (FDK) and Software Development Kit (SDK) tools for open customization on both FPGA and embedded ARM processor.

The Linux-based ARM CPU allows onboard data processing, automation, and algorithm execution. Multi-board synchronization is supported via front-panel connections for large-scale system integration.

Data readout is available through USB 3.0 Type-C and 1 Gigabit Ethernet interfaces, supporting both triggered and streaming acquisition modes.