Logo Caen

V785N

16 Channel Multievent Peak Sensing ADC

Features

  • High channel density
  • 12 bit resolution
  • 2.8 µs / 16 ch conversion time
  • 600 ns fast clear time
  • Zero and overflow suppression for each channel
  • ±1.5% differential non linearity
  • ±0.1% integral non linearity
  • 32 event buffer memory
  • BLT32/MBLT64/CBLT32/CBLT64 data transfer
  • Multicast commands
  • Live insertion
  • Libraries, Demos (C and LabView) and Software tools for Windows and Linux

Overview

The Mod. V785N is a 1-unit wide VME 6U module housing 16 Peak Sensing Analog-to-Digital Conversion channels. Each channel is able to detect and convert the peak value of the positive analog signals (with >50 ns risetime) fed to the relevant connectors. Input voltage range is 0 ÷ 4 V. The Mod. V785 N features LEMO 00 connectors for both input and control signals.
The outputs of the PEAK sections are multiplexed and subsequently converted by two fast 12-bit ADCs (2.8 µs for all channels).
The integral non linearity is ±0.1 of full scale range (FSR), measured from 2% to 97% of FSR; the differential non linearity is ±1.5% of FSR, measured from 3% to 100% of FSR. The ADCs use a sliding scale technique to reduce the differential non-linearity.
Programmable zero suppression, multievent buffer memory, trigger counter and test features complete the flexibility of the unit.
The module works in A24/A32 mode. The data transfer occurs in D16, D32, BLT32 or MBLT64 mode. The unit supports also the Chained Block Transfer (CBLT32/CBLT64) and the Multicast commands.
The board supports the live insertion that allows inserting or removing them into the crate without switching it off.

Technical Specifications

Packaging

1-unit wide 6U VME module

Inputs

16 channels, 1 kΩ impedance, positive polarity, DC coupling

Resolution

12 bit

Full Scale Range

4 V (if Sliding Scale is used FSR is reduced from 4095 to 3840 counts)

Min. Detectable signal

10 mV

Min. Input rise time

50 ns

RMS Noise

0.8 counts typical, 2 counts maximum

Integral non Linearity

0.1% of FSR (=3840 counts)
from 2% to 97% of FSR measured with > 100 ns rise time input signals

Differential non linearity

±1.5% from 3% to 100% of FSR (=3840 counts) measured with 1 µs rise time input signals

Interchannel Isolation

> 60 dB

Power rejection

0.007 count/mV (+5V); 0.02 count/mV (+12V); 0.003 count/mV (-12V)

Max. Gate width

1 ms

Temperature Stability
  • Offset: 0.12 counts/°C
  • Gain: 25 ppm/°C
Fast clear time

600 ns

Conversion time

2.8 µs for all channels

Zero suppression

Threshold values programmable in:

  • 16 ADC counts steps over the entire FSR
  • 2 ADC counts steps over 1/8 of FSR
GATE input

NIM signal, high impedance

Control inputs

Standard NIM input signals:

  • GATE: temporal window for peak detection
  • RST: resets PEAK sections, MEB status and control registers
  • VETO: inhibits the conversion of the peaks
  • FCLR: FAST CLEAR of PEAK sections and conversion
Control outputs

Standard NIM output signals:

  • DRDY: indicates the presence of data
  • BUSY: board full, resetting, converting or in MEMORY TEST mode
VME interface
  • A24/A32
  • Geographical Addressing
  • Multicast commands
  • D16/D32, BLT32/MBLT64, CBLT32/CBLT64

Compare

Compare with ADCs (Peak Sensing).

Loading...

Accessories

A316
Cable assembly 2.54mm 2-pin header female - 5 cm

Ordering Options

Code Description
WV785XNCAAAA V785NC - 16 Channel Peak Sensing ADC (4V, No JAUX,No 12V DCDC, live ins)   RoHS
WV785XNDAAAA V785ND - 16 Channel Peak Sensing ADC (4V, No JAUX,12V DCDC, No live ins)  

Contacts

Great to have you back!