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DT5560SE

Coming Soon

32 Channel 14 bit 125 MS/s Open FPGA Digitizer

Features

  • 32 channels, 14-bit @125 MS/s Desktop Digitizer
  • Single-ended inputs with advanced programmable Front-End
  • Based on powerful Xilinx Zynq-7000 SoC with open FPGA
  • Suitable for lab development, prototyping and testing with commonly used Physics detectors (PMTs, Gas Tubes, HPGe, ….)
  • 2 Vpp input dynamic
  • Fully supported by SCI-Compiler for easy FPGA programminge.
  • Configurable digital I/Os to interface with external systems
  • Maximum flexibility: Micro-USB, Ethernet and Optical Link connectivity , to support remote management as well as extreme fast data flow
  • 2.4” touch screen display for quick configuration and status control

Overview

The DT5560SE is a Desktop 32 Channels 14-bit 125MS/s Open FPGA Digitizer with Single-Ended inputs, designed to attain programmable data processing capabilities.

The R5560SE is designed as a solution for lab development, prototyping and system testing. It is suitable for a wide variety of experimenst in prototyping phase, especially for the readout of Physics detectors (like PMTs, Segmented HPGe, Gas Tubes, ….) in small setups, where it is important to have a compact system and the possibility to easily change the pulse processing algorithm. The advanced Front-End allows to easily connect and manage most of the detectors commonly used in Physics Experiments.

Thanks to the 32 Single-Ended Channels on LEMO, it allows an easy connection to the detectors and speeds up the development time. The Desktop form factor simplifies the use in laboratories and the Open FPGA allows to easily change the pulse processing algorithm for prototyping purposes.

SCI-Compiler software, the CAEN block-diagram-based firmware generator and compiler, helps in programming the FPGA to develop intensive real-time data processing .

A free and open-source demo readout software is available to manage the standard pulse height analysis firmware implementing energy measurements using a trapezoidal filter.

Application

  • Readout of the following detectors for testing/small experiment purposes:
    • Neutron Detector (3He tubes, position sensing tubes)
    • HPGe, Segmented germanium detector
    • Array/matrix of PMTs
    • Position sensing detectors (for application like gamma camera) with real-time position reconstruction
    • CdTE and CZT detector
    • Neutron scintillator detectors with Gamma Neutron discrimination

Developed in collaboration with 

Technical Specifications

General
Form Factor

Desktop

Weight

n.a

 

  

Analog Input
Channels

32 channels Single Ended

Full Scale Range
2 Vpp

Connector

LEMO 00 (50 Ω)

Bandwidth

60 MHz

  

Digital Conversion
Resolution

14bits

Sampling Rate

125 MS/s Simultaneously on each channel

 

  

Clock Generation

Clock source: internal/external
On-board programmable PLL provides generation of the main board clocks from an internal (25 MHz local
Oscillator) or external (rear panel CLK-IN connector) reference
External Clock from Sync connector with clock and sync propagation
Clock recovery and propagation from optical link with integrated jitter cleaner

LEMO Digital I/O
USER IO 0…5 (LEMO)
Programmable Digital I/O:s can be used as Trigger, Start, Busy
IN/OUT
Single-ended, Zin / Rt = 50 Ω
Trigger
Trigger Source

Internal/External: managed by the default firmware

Complex trigger logic: implementable by the user on the open FPGA

Trigger Propagation

Through LEMO and Sync Connector

 Trigger Time Stamp

Default FW: 32-bit counter, 8 ns resolution, 26-day range;
Custom FW: defined by the firmware design

  

FPGA

Open FPGA
Xilinx Zynq-7000 SoC Z-7030

Memory

1 GByte

Communication Interface

All readout interfaces allow to perform the same task at different speed and using different media. They can be used independently or simultaneously.
The different readout interface allows to integrate the DT5560SE in existing experimental environment.

 

Ethernet

1 Gbps

Micro-USB

Communcation and FPGA debugger

 

Optical Link

12.5Gbps link (bidirectional): can operate as point to point or in daisy chain mode

  

Firmware
Default

  • Waveform recording and Pulse Height Analysis
  • Ethernet communcation
Custom

Use SCI-Compiler to develop your own firmware

 

  

Firmware Upgrade

Firmware can be upgraded via Ethernet or Micro-USB

Software
  • SCI-55X0 Readout Software to manage the default firmware
  • SCI-Compiler for custom firmware development

Compare

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Ordering Options

Code Description
WDT5560SEXAA DT5560S 32 Ch. 14 bit 125 MS/s Digitizer single-ended (SciCompiler SW555 included)  RoHS

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