128 Channel Multihit TDC (100/200/800 ps)
- 3 programmable ranges: 100 ps LSB (19 bit resolution), 200 ps LSB (19 bit) and 800 ps LSB (17 bit)
- ECL/LVDS inputs automatically detected
- 5 ns Double Hit Resolution
- Leading and Trailing Edge detection
- Trigger Matching and Continuous Storage acquisition modes
- 32 k x 32 bit output buffer
- MBLT, CBLT and 2eSST data transfer
- Multicast commands
- Geopraphical address supported
- Live insertion
- Libraries, Demos (C and LabView) and Software tools for Windows and Linux
The VX1190A-2eSST is a 128 channel Multihit TDC, housed in a 1-unit wide VME64X 6U module. The unit features High Performance Time to Digital Converter chips developed by CERN. LSB can be set at 100 ps (19 bit resolution, 52 µs FSR), 200 ps (19 bit, 104 µs FSR) or 800 ps (17 bit, 104 µs FSR).
The channels can be enabled for the detection of hits rising/falling edges or for their width measurement (both the edges’ timing, and the hit width can be measured with the selected resolution). For each channel there is a digital adjustment for the zero-ing of any offsets. The data acquisition can be programmed in “Events” (“Trigger Matching Mode”, with a programmable time window) or in “Continuous Storage Mode”. Both ECL and LVDS input signals are supported.
The module programming is performed via a microcontroller that implements a high-level user friendly interface. The VME interface allows the module to work in A24 and A32 addressing modes.
The board houses a 32 k x 32 bit deep Output Buffer that can be readout via VME in a completely independent way from the acquisition itself.
The device supports MBLT, CBLT and 2eSST readout modes. Live insertion is also supported.
128 Channel Multihit TDC (100/200/800 ps)Product page
Compare with TDCs.
|WVX1190AEXAE||VX1190A - 2ESST 128 Ch. Multievent Multihit TDC 100-200-800 psec ECL/LVDS (no JAUX)|