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V1290N-2eSST

16 Channel Multihit TDC (25 ps)

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Features

  • 25 ps LSB
  • 21 bit resolution
  • 52 µs full scale range
  • NIM Input Signals
  • 5 ns Double Hit Resolution
  • Leading and Trailing Edge detection
  • Trigger Matching and Continuous Storage acquisition modes
  • 32 k x 32 bit output buffer
  • MBLT, CBLT and 2eSST data transfer
  • Multicast commands
  • Live Insertion
More info
3 Years Warranty
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Overview

The CAEN Mod.V1290N-2eSST is a 16 channel Multihit TDC, housed in a 1-unit wide VME 6U module. The unit features High Performance Time to Digital Converter chips developed by CERN. LSB is 25 ps (21 bit resolution, 52 µs FSR). The module accepts NIM inputs.

The channels can be enabled for the detection of hits rising/falling edges. For each channel there is a digital adjustment for the zero-ing of any offsets. The data acquisition can be programmed in “Events” (“Trigger Matching Mode”, with a programmable time window) or in “Continuous Storage Mode”.

The module programming is performed via a microcontroller that implements a high-level user friendly interface. The VME interface allows the module to work in A24 and A32 addressing modes.

The board houses a 32 k x 32 bit deep Output Buffer, that can be readout via VME in a completely independent way from the acquisition itself.

The device supports MBLT, CBLT and 2eSST readout modes. Live insertion is also supported.

Technical Specifications

Packaging

6U-high, 1U-wide VME unit

Inputs

16 NIM, 50  Ω impedance

Double hit resolution

5 ns

Acquisition modes

Trigger Matching Mode; Continuous Storage Mode

Built-in memory

32 kwords deep Output Buffer

Trigger Window Width

Programmable from 25 ns to 100 µs

Dynamic Range

52 µs

LSB

25 ps

RMS resolution

< 35 ps (typical)

Integral non linearity

< 2.5 LSB

Differential non linearity

< 3 LSB

Interchannel Isolation

≤ 3 LSB

Offset spread

< 2 ns

EXT TRIGGER input

Two LEMO 00 bridged connectors, NIM signal, 50  Ω

Clock source

Internal (40 MHz) or External (on Control connector), dip switch selectable

Control inputs

NIM std. input signals:

  • RST: resets Output Buffer, Status and Control registers.
  • CLR: FAST CLEAR of TAC sections rising-edge active, differential ECL input signals:
  • CLK: external clock
  • TRG: trigger for the TDC latching
Control outputs

NIM std. signal:
OUT_PROG: control output signal, programmable via the out prog control register

Displays
  • DTACK: green LED; lights up at each VME access.
  • PWR: green/red LED; green: power ON, red: failure status.
  • TERM: green LED; control bus termination ON.
  • FULL: red LED; memory full. ERROR: red LED; TDC global error.
  • ERROR: red LED; TDC global error.
  • DRDY: yellow LED; at least one datum in the output buffer
VME

Addressing modes: A24, A32, MCST Data transfer modes: D16, D32, BLT32, BLT64, CBLT, 2eSST

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Ordering Options

Code Description
WV1290BNXAAE V1290N - 2ESST 16 Ch. Multievent Multihit TDC 25 psec NIM (no JAUX)  

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