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DT5720

4/2 Channel 12 bit 250 MS/s Digitizer

Features

  • 12 bit 250 MS/s ADC
  • FPGA for real time Digital Pulse Processing:
  • 4/2 channels
  • MCX input (50 Ω, single ended)
  • 2 Vpp single ended input range
  • 16-bit programmable DC offset adjustment: ±1 V
  • Trigger Time stamps
  • Memory buffer: 1.25 MS/ch or 10 MS/ch
  • Programmable event size and pre-post trigger adjustment
  • Optical Link interface (CAEN proprietary protocol)
  • USB 2.0 interface
  • Firmware upgradeable via USB/Optical Link
  • Libraries, Demos (C and LabView) and Software tools for Windows and Linux
  • External AC-DC Power Supply Adapter (+12 V)
  • Dimensions: 154x50x164 mm3 (WxHxD)

Overview

The DT5720 is a 4/2 Channel 12-bit 250 MS/s Desktop Waveform Digitizer with 2 Vpp single ended input dynamics on MCX coaxial connectors. The DC offset is adjustable via a 16-bit DAC on each channel in the ±1V range.

The model is available in 4 versions: with 2 or 4 channels, different Multi event Buffer memory and different FPGA densities:

Version DT5720B DT5720D DT5720C DT5720E
No of Channels 4 4 2 2
Cyclone FPGA EP1C20 (20.000 LEs) EP1C20 (20.000 LEs) EP1C20 (20.000 LEs) EP1C20 (20.000 LEs)
Memory 1.25MS/ch 10MS/ch 1.25MS/ch 10MS/ch

The module features a front panel Clock Input and a PLL for clock synthesis from internal/external references. The data stream is continuously written in a circular memory buffer. When the trigger occurs, the FPGA writes further N samples for the post trigger and freezes the buffer that can be read by USB or Optical Link. The acquisition can continue without dead time in a new buffer.
Each channel has a SRAM Multi-Event Buffer divisible into 1 ÷ 1024 buffers of programmable size. Two sizes of the channel digital memory are available by ordering options: 1.25 MS/ch and 10 MS/ch. The readout (by USB or Optical Link) of a frozen buffer is independent from the write operations in the active circular buffer (ADC data storage). ‘Zero suppression’ and ‘data reduction’ algorithms allow substantial savings in data amount readout and processing, rejecting samples smaller than programmable thresholds. DT5720 supports multi-board synchronization allowing all ADCs to be synchronized to a common clock source and ensuring Trigger time stamps alignment. Once synchronized, all data will be aligned and coherent across multiple DT5720 boards.

The trigger signal can be provided externally via the front panel Trigger Input as well as via the software, but it can also be generated internally thanks to threshold self-trigger capability.

DT5720 houses USB 2.0 and Optical Link interfaces. USB 2.0 allows data transfers up to 30 MB/s. The Optical Link supports transfer rate of 80 MB/s and offers Daisy chain capability. Therefore, it is possible to connect up to 8/32 ADC modules to a single Optical Link Controller (Mod. A4818/A5818).

Software available
(Windows and Linux):
CAEN provides drivers for all the different types of physical communication channels, a set of C and LabView libraries (CAENComm and CAENDigitizer), demo applications and utilities:

  • CAENSCOPE: fully graphical program that implements a simple oscilloscope.
  • CAENUpgrader: tool that allows the user to update the firmware of the digitizers, change the PLL settings, load, when requested, the license for the pay firmware and other utilities.
  • CAEN WaveDump: software console application that can be used to configure and readout event data from any model of the CAEN digitizer family and save the data into a memory buffer allocated for this purpose.

Digital Pulse Processing firmware for Physics Applications – this special firmware allows to perform on-line processing on detector signal directly digitized:

(*) DPP-CI firmware and DPP-CI Control Software are no longer supported. To perform Charge Integration please refer to the DPP-PSD firmware and software

Technical Specifications

GENERAL

Desktop module: 154x50x164 mm3 (WxHxD)
Weight: 680 gr

ANALOG INPUT

Channels: 4/2 channels (MCX 50 Ω)
Bandwidth: 125 MHz
Single-ended
Input range: 2 Vpp
Programmable DAC for Offset Adjustment x channel: ±1 V

DIGITAL CONVERSION

Resolution: 12 bits
Sampling Rate: 31.25 to 250 MS/s simultaneously on each channel

SYSTEM PERFORMANCE

ENOB (Typ.): 10.14 (64 kS Buffer)
SINAD:62.85 dB
THD: 74.1 dB
SFDR: 82.0
SIGMA: 0.95 LSB rms (64 kS Buffer, open input)

ADC Sampling Clock generation

Three operating modes:

  • PLL mode: internal reference (50 MHz loc. oscillator)
  • PLL mode: external reference on CLK_IN
  • PLL Bypass mode: ext. clock on CLK_IN drives directly ADC clocks (Freq.: 31.25 ÷ 250 MHz)
DIGITAL I/O

CLK_IN (AMP Modu II):
– AC coupled differential input clock LVDS, ECL, PECL, LVPECL, CML (single ended NIM/TTL available)
– Jitter<100ppm
TRG_IN (LEMO 50 Ω, NIM/TTL): external trigger input
GPI/GPO (LEMO 50 Ω, NIM/TTL): programmable front panel input/output

ACQUISITION MEMORY
  • 1.25 MS/ch (5 ms @ 250 MS/s) or 10 MS/ch (40 ms @ 250 MS/s) Multi Event Buffer divisible into 1 ÷ 1024 buffers
  • Independent read and write access
  • Programmable event size and pre/post-trigger
TRIGGER

Common Trigger
– External (signal on TRG_IN)
– Software (by USB or Optical Link)
– Self trigger (internal threshold self-trigger)
Daisy chain trigger propagation among boards (using GPO)

TRIGGER Time Stamp

31-bit counter – 16 ns resolution – 17 s range

MULTI MODULES SYNCHRONIZATION

Clock distribution: by Fan Out
Trigger distribution: by Daisy chain or Fan Out
Time stamp synchronization

ADC AND MEMORY CONTROLLER FPGA

One Altera Cyclone EP1C4 or EP1C20 per channel

USB INTERFACE

USB 2.0 compliant
Up to 30 MB/s transfer rate

OPTICAL LINK

CAEN proprietary protocol, up to 80 MB/s transfer rate
Daisy chainable: it is possible to connect up to 8/32 ADC modules to a single Optical Link Controller
(Mod. A4818/A5818)

Upgrade

Firmware can be upgraded via Optical Link or USB interface

SOFTWARE

General purpose C libraries, configuration tools, readout software (Windows® and Linux® support). LabVIEW™ VIs and demos for Windows® only

ELECTRICAL POWER

Voltage range: 12 ± 10% Vdc. Power consumption (typ.): 1.5A @12V

Compare

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Accessories

A654
Cable assembly LEMO 00 male to MCX male – 1 m
A659
Cable assembly BNC male to MCX male – 1 m
AI2700
Optical Fiber Series
A318
Adapter for Clock signal FISCHER S101A004 male to 3-pin AMPMODU IV female – 10 cm
A317
Cable assembly for Clock distribution 3-pin AMPMODU IV female terminations – 18 cm / 25cm
A4818
USB 3.0 to CONET2 Adapter
A5818
PCI Express Gen 3 CONET2 Controller

Ordering Options

Code Description
WDT5720BXAAA DT5720B - 4 Ch. 12 bit 250 MS/s Digitizer: 1.25MS/ch, C20, SE   RoHS
WDT5720CXAAA DT5720C - 2 Ch. 12 bit 250 MS/s Digitizer: 1.25MS/ch, C20, SE   RoHS
WDT5720DXAAA DT5720D - 4 Ch. 12 bit 250 MS/s Digitizer: 10MS/ch, C20, SE   RoHS
WDT5720EXAAA DT5720E - 2 Ch. 12 bit 250 MS/s Digitizer: 10MS/ch, C20, SE   RoHS

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