Scientific instrumentation SiPM read out chip
- TRL Technology Readiness Level 8 – Full system using ASIC running – learn more
- Detector Read-Out SiPM, SiPM array
- Number of Channel 32
- Signal Polarity Positive
- Self-Triggers Programmable 10-bit DAC with min threshold = 1/3 p.e.
- OR trigger for timestamping and start of conversion
- Dynamic Range 0-400 pC i.e. 2500 photoelectrons @ 10^6 SiPM gain
- High and low gain branches, with 1:10 ratio for a total 0.95-600 amplification range
- 8-bit input DAC for channel-by-channel fine bias adjustment
- Slow shaper with adjustable shaping time from 12.5 to 87.5 ns
- Energy measurements by Track&Hold or Peak Detector
- 1% linearity energy measurements up to 2500 p.e.
- Power consumption 7mW/channel
Citiroc 1A is a 32-channel front-end ASIC designed to readout silicon photo-multipliers (SiPM) for scientific instrumentation application.
Citiroc 1A allows triggering down to 1/3 pe and provides the charge measurement with a good noise rejection. Moreover, Citiroc 1A outputs the 32-channel triggers with a high resolution timing (better than 100 ps).
An adjustment of the SiPM high-voltage is possible using a channel-by-channel DAC connected to the ASIC inputs. That allows a fine SiPM gain and dark noise adjustment at the system level to correct for the non-uniformity of SiPMs. CITIROC 1A can be calibrated using a unique calibration signal.
Timing measurement better than 100 ps RMS jitter is measured on single photo-electron along with 1% linearity energy measurement up to 2500 p.e. The power consumption is 225mW/ASIC when all stages are ON.
Compare with Weeroc chip.
|WWCITIROC1AB||CITIROC 1A - Scientific instrumentation SiPM read out chip - BGA (Ball Grid Array)|
|WWCITIROC1AQ||CITIROC 1A - Scientific instrumentation SiPM read out chip - QFP (Quad Flat Pack)|