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FW1495SC

128 Ch 200 MHz Multievent latching Scaler Firmware for V1495

Features

  • Up to 128 Channel Latching Scaler
  • 250 MHz maximum counting frequency
  • 32 bit channel depth
  • Multichannel scaler operation with programmable dwell time from 1 µsec to ~ 1 hour
  • 4 k x 32 bit multievent buffer memory
  • Trigger time tag
  • VME Block Transfer support
  • Free Trial version download

Overview

FW1495SC is a FPGA firmware for CAEN V1495 model that allows to use the Mod. V1495 as a Multievent latching scaler housing up to 128 independent counting channels (this maximum number of channels is achieved if the V1495 is expanded with two A395A boards). Each channel has 32 bit counting depth and accepts LVDS/ECL/PECL inputs; the maximum input frequency is 250 MHz (if A395D Mezzanine is used), 200 MHz for Motherboard and other Mezzanines.
The board has a FIFO memory that stores the values of the counter, latched “On the fly” at the trigger arrival, while the counting goes on. The Trigger signal can be provided by an external NIM/TTL signal or by a VME request. It is also possible to generate a periodical Trigger signal by means of an internal programmable timer. The counters can be also read out “On the fly” real time via VME. A programmable General Input signal (NIM /TTL) can be programmed as CLEAR, TEST or VETO (in common for all channels).
Free downloadable FW1495SC Trial version.

  • The User can download the Trial Version for evaluation
  • The Trial version has a DAQ time frame limitation: every 30 min the user have to restart (power off/power on) the board
  • To get full functionality the user should purchase a License and register it
  • The procedure is automatic and can be completed on our web site

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Code Description
WFW1495SCXAA FW1495SC - 128 Channels Latching Scaler for V1495  

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