LIROC 1
New
SiPM-based LiDAR read-out chip
Features
- TRL Technology Readiness Level 4 – ASIC validated in lab environment
- Detector Read-Out SiPM, SiPM array
- Number of Channel 64
- Signal Polarity Both Positive and Negative
- Sensitivity Trigger on 1/10 photo-electron
Overview
Liroc is a 64-channel front-end ASIC designed to readout Silicon Photomultipliers (SiPMs) for LiDAR applications. It enables precise triggering down to 1/3 photo-electron (p.e.), delivering a low-voltage differential trigger output for each channel. This offers exceptional timing accuracy (better than 20ps FWHM) and excellent separation between double peaks (100% efficiency with 5ns separation between single photo-electrons). Liroc permits rapid counting of single photons, exceeding 100MHz per channel.
Adjusting the SiPM’s high voltage (gain) is achievable using a 6-bit DAC for each channel connected to the ASIC inputs. Precise calibration on the trigger threshold can also be performed channel by channel, facilitated by 7-bit DACs. Liroc’s calibration can be based on the SiPM’s dark noise.
Liroc incorporates a GHz measurement line that includes an RF preamplifier with pole zero cancellation, a fast discriminator, and a low swing LVDS fast driver.
Technical Specifications
- TRL (Technology Readiness Level)
4 – ASIC validated in lab environment
- Available versions
Liroc : available June 2021
- Detector Read-Out
SiPM, SiPM array
- Number of Channel
64
- Signal Polarity
Both Positive and Negative
- Sensitivity
Trigger on 1/10 photo-electron
- Timing Resolution
Double peak separation : better than 5ns on single photo-electron
Time resolution : better than 20ps FWHM on single photo-electron
- Dynamic Range
up to 15 photo-electron with ToT @ 106 SiPM gain
- Packaging & Dimension
FC-BGA 516 20x20mm (Low-inductance flip chip)
- Power Consumption
210 mW – supply voltage 1.2V
- Inputs
64 voltage inputs with independant SiPM HV adjustments
- Outputs
64 CLPS (low common mode LVDS) trigger outputs
- Internal Programmable Features
- 64 HV adjustment for SiPM (64 x 6 bit)
- trigger threshold programming (10bits), 64 x 7 bit channel-wise threshold adjustment
- ASIC-wise polarity selector
- preamp gain adjustment
- individual trigger masking and cell powering.
- Evaluation systems
Evaluation board : Available June 2021
Compare
Compare with Weeroc chip.
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Ordering Options
| Code | Description |
|---|---|
| WWLIROC1BAAA | LIROC 1 SiPM Analogue Read-out Chip for Lidar and Photon Counting Application RoHS |
| WWTBLIROC1BA | Testboard for LIROC 1 BGA chip RoHS |
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Control Systems for Weeroc ASICs