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| Highlights |
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- High channel density
- 12-bit resolution
- 5.7 µs / 32 ch conversion time
- 600 ns fast clear time
- Zero and overflow suppression for each channel
- ±1.5% differential non linearity
- ±0.1% integral non linearity
- 32 event buffer memory
- BLT32/MBLT64/CBLT32/CBLT64 data transfer
- Multicast commands
- Live insertion
- Libraries, Demos (C and LabView) and Software tools for Windows and Linux
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The Model V785 is a 1-unit wide VME 6U module housing 32 Peak Sensing Analog-to-Digital Conversion channels. Each channel is able to detect and convert the peak value of the positive analog signals (with >50 ns risetime) fed to the relevant connectors. Input voltage range is 0 ÷ 4 V.
The outputs of the PEAK sections are multiplexed and subsequently converted by two fast 12-bit ADCs (5.7 µs for all channels). The integral non linearity is ±0.1 of full scale range (FSR), measured from 2% to 97% of FSR; the differential non linearity is ±1.5% of FSR, measured from 3% to 100% of FSR. The ADCs use a sliding scale technique to reduce the differential non-linearity.
Programmable zero suppression, multievent buffer memory, trigger counter and test features complete the flexibility of the unit.
The module works in A24/A32 mode. The data transfer occurs in D16, D32, BLT32 or MBLT64 mode. The unit supports also the Chained Block Transfer (CBLT32/CBLT64) and the Multicast commands.
A 16 ch. flat cable to LEMO input adapter (Mod. A385) is available for the Mod. V785 (one 32 ch. V785 requires two A385 boards). The board supports the live insertion that allows inserting or removing them into the crate without switching it off.
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| Packaging |
1-unit wide 6U VME module |
| Inputs |
32 channels, 1 kOhm impedance, positive polarity, DC coupling |
| Resolution |
12 bit |
| Full Scale Range |
4 V, optionally 8 V(if Sliding Scale is used FSR is reduced from 4095 to 3840 counts) |
| Min. Detectable signal |
10 mV |
| Min. Input rise time |
50 ns |
| RMS Noise |
0.8 counts typical, 2 counts maximum |
| Integral non linearity |
0.1% of FSR (=3840 counts)from 2% to 97% of FSR measured with > 100 ns rise time input signals |
| Differential non linearity |
±1.5% from 3% to 100% of FSR (=3840 counts) measured with 1 µs rise time input signals |
| Interchannel Isolation |
> 70 dB for > 200 ns rise time input signals |
| Power rejection |
0.007 count/mV (+5V); 0.02 count/mV (+12V); 0.003 count/mV (-12V) |
| Max. Gate width |
1 ms |
| Temperature Stability |
Offset: 0.12 counts/°CGain: 25 ppm/°C |
| Fast clear time |
600 ns |
| Conversion time |
5.7 µs for all channels |
| Zero suppression |
Threshold values programmable in:16 ADC counts steps over the entire FSR2 ADC counts steps over 1/8 of FSR |
| GATE input |
NIM signal, high impedance |
| Control inputs |
active-high, differential ECL input signals:GATE: temporal window for peak detection (ECL/NIM)RST: resets PEAK sections, MEB status and control registersVETO: inhibits the conversion of the peaksFCLR: FAST CLEAR of PEAK sections and conversion |
| Control outputs |
differrential ECL output signals:DRDY: indicates the presence of dataBUSY: board full, resetting, converting or in MEMORY TEST mode |
| VME interface |
A24/A32Geographical AddressingMulticast commandsD16/D32,BLT32/MBLT64,CBLT32/CBLT64 |
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Compare with other
ADCs (Peak Sensing)
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Model |
Package |
Function |
Description |
Compare
All / Reset |
| Code |
Description |
| WV785XACAAAA |
V785AC - 32 Channel Peak Sensing ADC (4V, No JAUX,No 12V DCDC, live ins) |
| WA385XAAAAAA |
A385 - 16 Channel Cable Adapter (Flat to Lemo) forV785, 50cm ±10% cables |
| WV785XAGAAAA |
V785AG - 32 Channel Peak Sensing ADC (8V, No JAUX,No 12V DCDC, live ins) |
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| © 2000 - 2010 CAEN S.p.A. All rights reserved. |
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