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DT5550W

Weeroc ASIC Development System
The DT5550W is a development and DAQ platform with programmable FPGA designed to read out Weeroc ASICs. The DT5550W can be used either as evaluation system for WeeROC ASICs, either as full featured Acquisition System supporting a wide range of detectors (SiPMs, PMTs, GEMs, etc.. ).

The full system is composed by two boards: a motherboard with an FPGA, USB 3.0 connectivity, power supply and ADCs, and a replaceable piggyback board that hosts 1,2 or 4 Weeroc ASICs, detector connectors and high voltage power supply (if using SiPMs).

The DT5550W has an onboard 14-bit 80 MS/s simultaneous sampling ADC, to monitor and acquire the analog outputs of the ASICs.

A default firmware is provided for each supported piggyback board, allowing the user to read-out the ASICs and perform energy and time measurements with the supported detectors.

The DT5550W includes the license for SCI-Compiler, a graphic tool for Windows which allows the user to realize a custom readout logic for the available ASICs. This tool allows to generate the VHDL firmware code starting only from graphical blocks which can be connected together in the GUI, thus reducing the development time also for non-expert firmware designers.

The following piggyback boards are available:

Piggyback boardASICOptimal detectorsCompatible detectors (not tested)Channels No,Availability
A55PET44 x PETIROC2ASiPM, SiPM matrixRPCs128NEW
A55PET22 x PETIROC2ASiPM, SiPM matrixRPCs64NEW
A55PET11 x PETIROC1ASiPMRPCs32NEW
A55CIT44 x CITIROC1ASiPM, SiPM matrix/128COMING SOON
A55CIT22 x CITIROC1ASiPM, SiPM matrix/64COMING SOON
A55CAT11x CATIROC1PMTMA-PMT16COMING SOON
A55MAR11 x MAROC3APMT, MA-PMTSiPM64COMING SOON
A55PHO11 x PHOTOROC1APMT, MA-PMTSiPM64COMING SOON
A55GEM11 x GEMROC1Micromegas GEMsAPD, Pin-Diode, Silicon Strips64COMING SOON


PETIROC Piggyback Board
As an example of piggyback, the A55PET4 hosts 4 PETIROC2A chips, offering to the user the possibility to read out up to 128 SiPM detectors or two 64-channels SiPM matrices. The board can be fitted with CAEN A7585D HV module to bias all connected SiPMs. Up to 2 Hamamatsu matrices (64 channels) can be connected directly on the piggyback board, with the possibility to use an external adapter for any kind of matrix or array interfacing.

Developed in collaboration with Nuclear Instruments Srl
Form Factor Desktop
Bias Voltage CAEN A7585D Power Supply for SiPM available on A55PETx and A55CITx piggyback
Digital Conversion Internal ASIC ADC or external 80 MS/s, 14-bit ADC
Clock Generation Clock source: internal/external

On-board programmable PLL provides generation of the main board clocks from an internal (25 MHz local Oscillator) or external (CLK-IN connector) reference
LEMO Digital I/O
CLOCK-IN (LEMO)
Zin = 50 Ohm
Single-ended, 25 MHz, 3.3V

CLOCK-OUT (LEMO)
Rt = 50 Ohm
Single-ended, 25 MHz, 3.3V, 50mA
GPIO 1..8 (LEMO)
General purpose programmable digital I/Os Single-ended, Zin/ Rt= 50 Ohm
Memory Common FIFO buffer
Trigger
Trigger Source Internal/External: managed by the default firmware Complex trigger logic: implementable by the user on the open FPGA

Trigger Propagation
Through programmable LEMO GPIO 1
Timing Resolution
Default FW
-Digital Readout: refer to the ASIC datasheet
-Analog Readout: 12.5 ns
-Counting/TDC mode : 2 ns
Custom FW
-Digital Readout: refer to the ASIC datasheet
Synchronization
Clock Propagation
- LEMO CLOCK IN/OUT connectors
Acquisition Synchronization
- Through programmable LEMO GPIO 1
FPGA Open FPGA
Xilinx XC7K160T (Kintex-7 family)
Communication Interface USB 3.0
USB 2.0 back compatibility
Up to 240 MB/s transfer rate
Firmware
Default
Basic ASICs readout
Custom
Use SCI-Compiler to develop your own firmware (LICENSE INCLUDED)
Firmware Upgrade Firmware can be upgraded via USB
Software - SCI-5550W Readout Software to manage the default firmware
- SCI-Compiler for custom firmware development
Code Description
WDT5550WXAAA DT5550 - Weeroc ASICS Evaluation System
WW55PETI2AA1 A55PET1 - Evaluation Board with 1 PETIROC chip
WW55PETI2AA2 A55PET2 - Evaluation Board with 2 PETIROC chip
WW55PETI2AA4 A55PET4 - Evaluation Board with 4 PETIROC chip
WW55CITI1AA1 A55CIT1 - Evaluation Board with 1 CITIROC chip
WW55GEMR1AA1 A55GEM1 - Evaluation Board with 1 GEMROC chip
WW55MARO3AA1 A55MAR1 - Evaluation Board with 1 MAROC chip
WW55PHOT1AA1 A55PHO1 - Evaluation Board with 1 PHOTOROC chip
WW55TRIR1AA1 A55TRI1 - Evaluation Board with 1 TRIROC chip
Model Package Function Description Compare
All - Reset
CRAMS Read Out Systems Analog Multiplexed ASICs Readout Systems CAEN Readout System for Multiplexed Signals
DT5550 Read Out Systems Analog Multiplexed ASICs Readout Systems 32-channel DAQ system with user programmable FPGA and sequencer
DT5550W Read Out Systems Analog Multiplexed ASICs Readout Systems Weeroc ASIC Development System

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