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Home / About us / Desktop Digitizers

From 1 to 32 channels, up to 5 GS/s - FPGA firmwares for Digital Pulse Processing.

The Desktop is the stand alone form factor of the CAEN products. It provides the same performances of the other form factors and take the advantage of an easier and portable use, requiring no crates.
CAEN has developed a complete family of digitizers in this form factor that consists of several models differing in sampling frequency, resolution, number of channel, memory size and other parameters. In parallel with the hardware development, CAEN have made a big effort in developing algorithms for the Digital Pulse Processing (DPP); you can install a DPP algorithm on the FPGA of the digitizer (firmware upgrade), run it on-line and implement new acquisition methods that go beyond the simple waveform recording. A digitizer with DPP becomes a new instrument that represents a fully digital replacement of most traditional modules such as Multi and Single Channel Analyzers, QDCs, TDCs, Discriminators and many others.

MAIN FEATURES

Analog Input:
  • Single Ended 50 Ohm
  • Fixed Dynamic Range (different options available)
  • DC offset adjust in the full range (±FSR/2)
Trigger:
  • External Trig-In, Software or channel self-trigger
  • Common or Individual (DPP only)
  • Trig-Out for trigger propagation
  • Digital timing and trigger filters for pulse triggering (DPP only)
  • 32 bit Time Stamp
Synchronization:
  • One-to-many clock distribution
  • Cable delay compensation
  • Trigger In/Out
  • External Time Stamp reset
Memory:
  • Up to 1024 acquisition buffers
  • Independent read/write access
FPGA:
  • On-line Digital Pulse Processing (DPP) for pulse shaping and height analysis, digital charge integration, gamma-neutron discrimination, timing, segmented detectors, etc.
Readout:
  • USB (30MB/s), CONET (80MB/S)

Desktop Digitizer Selection Table

Model
Channels(1)
Max Sampling
Rate (MS/s)
Resolution
Bandwidth
(MHz)
Memory
(MS/ch)(1)
DPP firmware(4)
4 / 2
250
12
125
1.25 / 10
4 / 2
100
14
40
0.5 / 4
8
250
14
125
0.64 / 5.12
8
500
14
250
0.64 / 5.12
32
62.5
12
30
0.19
4 - 2
1000 - 2000
10
500
1.8 - 3.6
1
4000
10
1000
7.2
no
16+1
5000(2)
12
500
0.128 / 1
no
8
3200(2)
12
500
0.007
no
(1) The indication "size 1/ size 2" denotes different model versions while "size 1 - size 2" denotes different model operating modes
(2) Sampling frequency of the analog memory (switched capacitor array); A/D conversion takes place at lower speed (thus generating a Dead Time.)
(3) Coming soon for 725 and 730 families
(4) Digital Pulse Processing (DPP) firmware:
  • DPP-PHA: Pulse Height analysis (Trapezoidal Filters);
  • DPP-CI: Charge Integration (digital QDC);
  • DPP-PSD: Pulse Shape Discrimination;
  • DPP-ZLEplus: Digital Pulse Processing for the Zero Length Encoding (enhanced zero suppression algorithm)
  • DPP-DAW: Digital Pulse Processing for Dynamic Acquisition Window
  • DPP-QDC: Digital Pulse Processing for Charge Integration in High Density Systems