false
X

Mail

Have you lost your password?

if you have forgotten your password click HERE

If you have not received the activation mail click here

Print
main Digitizer
NEW

Digitizer Families

CAEN worldwide leader in the digitizer and pulse processing tecnology

Features
  • High resolution: up to 14 bit
  • High sampling rate: up to 5 GS/s
  • High density: up to 64 channels per module
  • Digital Pulse Processing Firmware for Pulse Height Analysis, Charge to Digital Converter, Charge Integration, Dynamic Acquisition Window, Pulse Shape Discrimination and effective Zero Suppression
  • Available in different form factors: VME64, VME64x, NIM, Desktop
  • Scalable from small bench setup to big experiments arrays
  • Well suited for:
    - organic, inorganic and liquid scintillator coupled with PMTs,
    - SiPMs and others silicon, HPGe and diamond detectors
  • Daisy chain capabilities
  • Multi-board synchronization features
  • USB and Optical Link communication interfaces
Applications
  • Nuclear and Particle Physics
  • Dark Matter and Astroparticle Physics
  • Neutrino Physics
  • Fast Neutron Spectroscopy
  • Fusion Plasma Diagnostic
  • Environmental Monitoring
  • Homeland Security
Overview

CAEN has developed a complete family of digitizers that consists of several models differing in sampling frequency, resolution, number of channels, form factor, memory size and other parameters.


The following table shows all the currently available models. In parallel with the hardware development, CAEN has made a big effort in developing algorithms for the Digital Pulse Processing (DPP); the user can install a DPP algorithm on the FPGA of the digitizer (firmware upgrade), run it on-line and implement new acquisition methods that go beyond the simple waveform recording. A digitizer running a DPP firmware becomes an enhanced instrument that represents a fully digital replacement of most traditional modules such as Multi and Single-Channel Analyzers, QDCs, TDCs, Discriminators and many others

Model (1)
Form Factor
N. of ch. (2)
Single-Ended
Max Sampling
Frequency (MS/s) (2)
Resolution (bit)
Input Dynamic Range (Vpp) (2)
Bandwidth (Mhz) (2)
Memory (MS/Ch) (2)
DPP firmware (3)
VME
Desktop / NIM
8
4 / 2
250
12
2
125
1.25 / 10
VME
Desktop / NIM
8
4 / 2
100
14
0.5 / 2.25 / 10
40
0.5 / 4
VME
Desktop / NIM
16 / 8
8
250
14
0.5 - 2
125
0.64 / 5.12
VME
Desktop / NIM
16 / 8
8
500
14
0.5 - 2
250
0.64 / 5.12
VME
Desktop / NIM
64
32
62.5
12
2 / 10
30
0.19 / 1.5
VME
Desktop / NIM
8 - 4
4 - 2
1000 - 2000
10
1 / 0.2
500
1.8 - 3.6 / 14.4 - 28.8
VME
Desktop / NIM
2
1
4000
10
1
1000
7.2 / 57.6
n.a.
VME
Desktop / NIM
32 + 2
16 + 1
5000 (4)
12
1
500
0.128 / 1
n.a.
VME
Desktop / NIM
16
8
3200 (4)
12
2.5
500
0.007
n.a.

(1) The x in the model name is V1 for VME, VX1 for VME64X, DT5 for Desktop and N6 for NIM
(2) The indication "size1/size2" denotes different model versions while "size1-size2" denotes different model operating modes
(3)Digital Pulse Processing (DPP) firmware:
- DPP-PHA: Pulse Height analysis (Trapezoidal Filter)
- DPP-PSD: Pulse Shape Discrimination
- DPP-ZLEplus: Digital Pulse Processing for the Zero Length Encoding (enhanced Zero Suppression algorithm)
- DPP-DAW: Digital Pulse Processing for Dynamic Acquisition Window
- DPP-QDC: Digital Pulse Processing for Charge to Digital Converter
(4) Sampling frequency of the analog memory (switched capacitor array); A/D conversion takes place at lower speed (thus generating a Dead Time)


Principle of Operation
Principle of Operation
CAEN Digitizer shares with a digital oscilloscope essentially the basic operating, where the analog signal is sampled by a flash ADC, whose output, i.e. the stream of digital samples, is continuously read by an FPGA and stored in a circular memory buffer of a programmable size. At the arrival of the trigger, the buffer is frozen and made available for the readout, while the acquisition can continue in a new buffer. However, there are few important differences between a digitizer and a commercial digital oscilloscope:

arrow_forward
Digitizers allow for dead-timeless acquisition
arrow_forwardw
High flexibility of trigger configuration
arrow_forward
Scalability and synchronization of multi-board systems
arrow_forward
High bandwidth data readout links
arrow_forward
Signal Digitization and Pulse Processing

The benefits of the digital approach are great stability and reproducibility, ability to reprogram and tailor the algorithms to the application, ability to preserve the information of the signal along the entire acquisition chain, flexibility, better correction of baseline fluctuation, pile-up, ballistic deficit, etc.. All in one board.

looks_one
Digitizers allow for dead-timeless acquisition
The digitizers have the ability to accept two consecutive triggers very close to each other thanks to the multi-buffer memory management: there is no dead time between an acquisition window and the next one. It is even possible to accept two triggers for which the acquisition windows overlap.
Dead-timeless feature is not supported by all digitizer models and all the firmware.

looks_two
High flexibility of trigger configuration
Each channel of the digitizer is able to implement a digital discriminator that generates a trigger when a certain condition is met; in the basic implementation, this is just a programmable threshold which is continuously compared to the digitized input.

More advanced algorithms (digital CFD, timing filters, etc.) are implemented in special DPP firmware. The individual channel self-trigger can be used to generate a global trigger for a simultaneous acquisition of all the channels within a board, can be propagated to the front panel connectors in order to make a multi-board triggering logic or can be used locally for an independent acquisition channel by channel (DPP mode only). It is also possible to combine the individual self-triggers to create a configurable coincidence or anticoincidence logic, either within the board or across multiple digitizers.

looks_3
Scalability and synchronization of multi-board systems
In most cases, the applications that require the use of several channels need to synchronize the acquisition across different digitizers. This is performed according to the following points: Distribution of a common clock reference in order to have the same sampling clock on all the ADC channels. CAEN digitizers feature a programmable PLL able to generate the sampling clocks locked to an external clock input, whose distribution can be done in parallel from a common source, using a fan-out, as well as through an in-out daisy chain with the ability to use the first board as a clock master (VME models only). Alignment of the time stamp associated with the triggers to allow off-line reconstruction of the events read from different boards. This can be done by using an external signal as well as through an in-out daisy chain.

Distribution of the triggers from channel to channel and from board to board, according to a certain trigger logic. Each card has different trigger sources: external TRG-IN from the front panel, software trigger and channel self-triggers. All these triggers can be combined in order to make coincidences, majorities, global triggers and other functions.

looks_4
High bandwidth data readout links
The digitizers are designed to provide high rate data transfer to a computer or an external data processing unit. CAEN digitizers have a bandwidth of 30MB/s in the case of the USB, about 80MB/s with CONET port up to more than 120MB/s for the VME with 2eSST.

The communication interfaces allow the user to operate post-processing data analysis.

looks_5
Signal Digitization and Pulse Processing
The flash ADC technology has improved significantly in the last decades providing always higher resolution and faster sampling speed. The use of flash ADCs in acquisition boards gives the possibility to convert the analog signal preserving the information required by the experimental activities and the applications of nuclear techniques.

Digital acquisition devices described in this section represent multi-channel waveform digitizers providing time information and digitized signal waveforms through fast communication interfaces, allowing the user to operate post-processing data analysis.

The waveform digitizers integrate also field programmable gate arrays (FPGA) which are able to acquire the information from flash ADC in real time and process it. Algorithms can be programmed, and their parameters can be adjusted to different experimental conditions. Those algorithms may be the digital replacement of the traditional analog signal processing, so that the waveform digitizer embeds different functions in one single board. In particular, it is possible to replace timing filters such as Constant Fraction Discriminators, shaper amplifier, Peak Sensing ADC, QDC, TDC, etc.

Most of the algorithms are implemented at firmware level inside the FPGA, which also manages the overall acquisition and data transfer. Data is read by a software, which is able to both program the digitizer and to perform the acquisition. Most advanced software also provides specific analysis tool, such as peak fitting.


Acquisition modes
CAEN Digitizers can be operated in different acquisition modes:

looks_one
Waveform Recording
The digitizer is able to acquire, digitalize and record the input pulse within a programmable time window. Simplified zero suppression functions can be configured. All CAEN digitizers are equipped with their proper firmware for waveform recording.

CAENScope and WaveDump software are available to manage the acquisition. Data can be saved in real time for offline analysis.

Furthermore, the 742 and 743 families, which come with two different switched capacitor chips, are well suitable for high precision time measurement of fast signals. WaveDump and the dedicated WaveCatcher software (free download) can control the acquisition of the two boards respectively.
Firmware:
psd
Waveform Recording
Software:
psd CAENScope
psd WaveDump
psd WaveCatcher

psd
looks_two
Digital Pulse Processing (DPP)
Where the algorithm inside the FPGA not only acquires the waveform, but also performs additional processing to get
a set of significant information like energy, pulse shape and precise timing.
psd
To cover most of the applications, CAEN developed 5 main DPP, equipped with demo software tools or dedicated Control Software:
Digital Pulse Processing Firmware
psd
Pulse Height Analysis
psd
Pulse Shape Discrimination
psd
Charge to Digital Conversion
psd
Zero Length Encoding
psd
Dynamic Acquisition Window
Digital Pulse Processing Software
psd
Multiparametric DAQ Software for Physics Applications
psd
User Friendly Software for DPP-PHA Management
psd
Graphical Interface for DPP-PSD Management
psd
Demo Software for DPP-ZLEplus Management
psd
Demo Software for DPP-QDC Management
psd
Demo Software for DPP-DAW Management
psd
Digital Pulse Height Analysis
Pulse Height Analysis for gamma ray spectroscopy applies to voltage signals coming from HPGe/Si detectors and Scintillators coupled with Charge Sensitive Preamplifiers. Works with independent channels event acquisition and in time stamped list mode. Energy spectra are built by the supported software like the new CoMPASS and MC2 Analyzer.
psd
Pulse Shape Discrimination
Pulse Shape Discrimination for gated charge integration and gamma-neutron discrimination is suited for current signals coming from Scintillators, Gas tubes, SiPM and PMT. Works with independent channels event acquisition and in energy & timing list mode. Features digital CFD and timing interpolation for high resolution time information, as well as pulse shape discrimination. Energy spectra are built by the supported software like the new CoMPASS and the DPP-PSD Control Software.
psd
Charge to Digital Conversion
Charge to Digital Conversion implements a Gated Integrator receiving signals directly from the detector (no charge preamp required). Suited for Scintillators and Gas detectors with medium-slow decay time, but can also work with faster detectors such as LaBr3. Designed for high channel density digitizers, can be used for multi-channel acquisition in Detector Array systems. Features independent channel acquisition with self-gating capability for the charge integration (no additional delay lines, no external discriminator). Energy and time stamped list mode provides timing information as well as energy information for spectra calculation.
psd
Zero Length Encoding
Zero Length Encoding for advanced zero suppression works with a common trigger and simultaneous acquisition on all channels. The digitized waveforms are transferred in compressed mode by suppressing baseline and empty channels.
psd
Dynamic Acquisition Window
Dynamic Acquisition Window is suited for zero suppression with trigger-less acquisition systems. Works in waveform mode and independent channels event acquisition dynamically stretching the acquisition window (record length) to fit the actual input pulse duration.
CAEN Digitizer block diagram
The motherboard defines the form-factor; it contains one FPGA for the readout interfaces and the services
The daughterboard discriminates the digitizer type; it contains the signal conditioning input stage, the ADCs, the FPGA for the data processing and the memories